Milind T.

Milind T. is a seasoned professional specializing in mixed signal design and verification. With a Bachelor's degree in Electronics Engineering from Vishwakarma Institute of Technology and a Master's degree in Electrical and Electronics Engineering from Texas Tech University, Milind has held key positions in organizations such as PMC-Sierra, Qualcomm, and Renesas Electronics. Currently a Manager at Renesas Electronics since 2019, Milind leads efforts in System Verilog, Verilog-AMS, and UVM-AMS development. Previous roles include an ASIC Design/Verification Engineer at PMC-Sierra and a Design and Verification Engineer at Qualcomm, where they crafted verification environments and enhanced design specifications. Milind continues to contribute to the field as an SPE Mixed Signal Design and Verification engineer at Rambus since 2025.