Roman Shah

Roman Shah is a seasoned FPGA engineer with extensive experience in the field. Currently serving as a Senior FPGA Engineer at Rapidev since January 2025, Roman previously worked as an FPGA Design Engineer at Rapid Silicon from July 2022 to January 2025 and at the Cyber Reconnaissance and Combat Center from January 2018 to July 2022. Roman began a career in engineering as a Research Officer with the Pakistan Air Force from March 2016 to September 2017. Roman holds a Bachelor of Engineering in Electrical and Computer Engineering from COMSATS University Islamabad (September 2011 - September 2015), and earlier educational credentials include an HSSC in Pre-Engineering from GDC Malakand Dargai and an SSC in Science from GHSS No.1 Dargai.