Ken Cheng is the Deputy Director of Design Verification Engineering for the CNBG at Realtek Semiconductor Corp., where they lead design verification teams employing advanced verification technologies to produce high-quality SOC chips with minimal respin rates. With over 20 years of experience in fabless design houses, Ken has held various roles, including ASIC Design Engineer at Admtek Inc. and Hardware Design Engineer at Syntran Technology. Prior to their current position, Ken served as a Senior Design Verification Manager and Design Verification Manager at Realtek, overseeing the verification of multiple product lines. Ken earned a Bachelor of Science in Control Engineering from National Chiao Tung University in 1992.
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