Aanchal Narula is a Verification Engineer with extensive experience as a Lead Design Engineer, totaling seven years in the field. Aanchal completed an M.Tech in VLSI Design Engineering and had a research paper selected for the Design Automation Conference (DAC-2016), focusing on a UVM powered Embedded Emulation Platform. Currently, Aanchal serves as a Staff Design Verification Engineer at Renesas Electronics, contributing to a product portfolio generating billions in annual revenue. Aanchal has previously worked with renowned companies, including AMD, NXP Semiconductors, and HCL Technologies, showcasing expertise in design verification and ASIC flow.
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