Daniel Chieng

Daniel Chieng is a Senior Design Manager at Renesas Electronics, having joined the company in February 2017. Chieng's focus is on developing smart power stages (SPS), which integrate smart drivers and high-side/low-side MOSFETs. Prior to Renesas, Chieng held positions at Intersil, where responsibilities included managing multiple design projects for power management system-on-chip (SOC) designs following Intersil's acquisition by Renesas. Chieng's career began at D2Audio, designing high-performance audio Class-D PWM controllers, and includes significant experience at Cirrus Logic, contributing to the development of various integrated circuits, and at IBM in hardware and software development. Chieng holds a Master of Science in Electrical Engineering and a Bachelor of Science in Electrical Engineering, both from the Georgia Institute of Technology.