Ishdeep Singh

Ishdeep Singh is a Principal Engineer DV at Renesas Electronics, specializing in verification engineering with extensive experience in developing and utilizing System Verilog-based verification environments, including VMM, UVM, and OVM. Previously, Ishdeep worked as a Senior Principal Engineer at NXP Semiconductors and has been involved in verifying IPs at both block and SoC levels across various protocols such as PCIe and Ethernet. Ishdeep holds a dual degree in Electrical Engineering from the Indian Institute of Technology, Kanpur, obtained in 2009.