Jitendra Mishra is a Mixed Signal Designer currently enhancing memory interfaces at Renesas Electronics. They possess a robust background in circuit design, having worked as a Mixed Signal Design Engineer at Altran and as a Junior Research Fellow at CSIR-CEERI, where they focused on MEMS-based accelerometers and DACs. Jitendra has successfully completed three tape-outs and has designed oscillators, PLLs, and band-gap reference circuits throughout their career. They earned an MTech in Advanced Semiconductor Engineering from the Academy of Scientific & Innovative Research and a BTech in Electronics and Communications Engineering from Madan Mohan Malaviya Engineering College.
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