Rob Colclasure is a Principal Tape Out and Layout Methodology Engineer at Renesas Electronics, where they have leveraged 37 years of semiconductor IC photomask experience to ensure error-free fabrication of new products. They have mentored a global team of Layout Designers, collaborated with various IC manufacturing disciplines, and implemented benchmark processes that significantly reduced photomask errors. Rob previously held several positions at Freescale Semiconductor, including Mask Preparation Template Manager and CAD/NPI/Reticle Engineering Manager, and graduated with an Associate of Applied Science in Electronics from DeVry University, achieving a GPA of 3.97.
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