Vedavyas J.

Vedavyas J. is a Senior Analog Design Engineer at Renesas Electronics, with an extensive background in analog and mixed-signal design. They graduated with a Master’s Degree in Analog VLSI from The University of Texas at Dallas and have gained valuable experience at companies such as IDT, Semtech, and Analog Rails. Throughout their career, they have specialized in high-speed circuitry, including PLLs and ADCs, and have demonstrated proficiency in various CAD tools and lab equipment. Vedavyas has also contributed to research on noise filtering techniques during their undergraduate studies.