Wang Chen is a seasoned validation engineer with expertise in post-silicon validation of memory modules. They previously held the position of Senior Validation Engineer at Shanghai Suiruan Technology in 2020 and spent a decade as a Staff Application Engineer at Montage Technology, Inc., focusing on DDR4/5 memory buffers. Currently, Wang serves as a Staff System Engineer at Renesas Electronics, specializing in system validation for memory buffer chips. Wang earned a Bachelor's degree in Mathematics from Suzhou University in 2006.
Location
Pudong, China
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