Yi Wang

Yi Wang is a highly experienced Principal Analog Verification Engineer with a career spanning over a decade in the semiconductor industry. Currently serving at Renesas Electronics, Yi Wang leads AMS verification efforts by defining verification plans and establishing automatic regression testing environments. Previously, at Dialog Semiconductor, responsibilities included similar AMS verification leadership roles amid a progression from Senior Analog Verification Engineer. Notable earlier experiences at NXP Semiconductors involved significant contributions to analog design and verification for power management units, as well as roles in circuit design and testing across multiple process nodes. Yi Wang's academic foundation includes a PhD in Electrical Engineering from Zhejiang University, complemented by a bachelor’s in Electronics and Information Engineering.