Peter Stepien

Peter Stepien is the Principal Engineer at ResTech Pty Ltd, where they design and implement complex digital systems. They served as a Senior Research and Development Engineer at ResTech from 2007 to 2018, focusing on digital circuit design and the analysis of power systems. With extensive academic experience, Peter held positions as a lecturer and unit coordinator at various institutions, including the University of Sydney and the University of Newcastle, covering subjects like embedded systems and control engineering. Peter was also a visiting lecturer at the Harbin Institute of Technology from 2015 to 2018, specializing in electronic devices and circuits. They began their career as a Cadet Engineer at the Electricity Commission of NSW in 1986.