Daniel D. is currently an IT Consultant and has held the position of Senior FPGA Section Manager at RTX in 2025 and previously served as a Senior FPGA Design Engineer and FPGA Design Engineer in San Jose, California. Daniel began their career as a Consumer Premise Engineering Intern at AT&T in 2017. They earned a Bachelor's degree in Electrical Engineering from the University of Southern California, having attended from 2016 to 2019, and continue their education at Iolani School while pursuing a High School Diploma.
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