Grant Sandy

Grant (Rocky) Sandy is a Senior Principal Design Verification Engineer at Raytheon Technologies, specializing in HDL design verification for ASIC and FPGA products, system modeling, and logic simulation using tools such as SystemVerilog and UVM. With extensive experience in various high-tech companies, they have contributed to projects in FPGA verification, military electronic countermeasures, and multimedia recording products. Rocky's past roles include Senior Electrical Engineer at Elbit Systems of America and Design Verification Consultant at Zaiq Technologies Inc. They hold a BSEE in Electrical Engineering and Computer Engineering from the University of New Hampshire, along with further studies in Electrical Engineering and Decision Theory.