• RTX

MP

Michael Parker

Engineering Fellow

Michael Parker is an accomplished Engineering Fellow at Raytheon Technologies, contributing to the Advanced Concepts Technology department within the Space and Intelligence Division, and collaborating with the Advanced Technology group in the Missile Defense Division. With extensive engineering experience spanning defense, semiconductor, wireless, and industrial industries, Michael's expertise is complemented by a role as Principal System Planning Architect at Intel (formerly Altera), where industry trends and system requirements were defined for applications in wireless, military, and broadcast. Previously, as Principal DSP and Embedded Video Product Planning and Technology Strategy at Altera, responsibilities included shaping the future of DSP architecture and toolflows. Michael holds a Bachelor's Degree in Electrical Engineering from Rensselaer Polytechnic Institute and a Master's Degree in Electrical Engineering, specializing in DSP and Digital Communications, from Santa Clara University.

Links


Org chart

This person is not in the org chart


Teams

This person is not in any teams


Offices

This person is not in any offices