Saurabh Morarka

Saurabh Morarka is currently a Principal PPA/DTCO/ML Engineer at Samsung Electronics, where they apply their expertise in design technology co-optimization (DTCO), physical design, and machine learning to optimize chipsets. With over three years of experience in this role, they oversee the physical design flow from RTL to GDS. Previously, Saurabh held positions at Qualcomm, where they focused on chip design metrics, and Intel, where they contributed to RF transistor research and FinFET development. They earned a Ph.D. in Electrical and Electronics Engineering from the University of Florida and a B.Tech. in Electronics Engineering from the Indian Institute of Technology (Banaras Hindu University).