Amit Agarwal

Amit Agarwal is a seasoned engineering professional with extensive experience in ASIC design and verification across multiple companies. Currently serving as a Principal Design Engineer/Manager at SatixFy since October 2016, Amit specializes in the architecture of second-generation Digital Beam forming chips for phased array antennas, focusing on translating product requirements into chip architecture. Prior to this role, Amit held various positions including Senior ASIC Design Engineer at Ericsson and Senior Staff Engineer at Broadcom, contributing to advancements in video compression technology and display compression standards. Amit's foundational experience includes engineering roles at Qualcomm, where responsibilities encompassed telecommunications chipset design, and Tata Elxsi, where contributions were made in automotive, telecommunication, and DSP-based designs.