Jeff Stone is an experienced Electronic Design Engineer with a strong background in VLSI, FPGA, DSP, firmware, and software development. They have contributed to various projects, including the verification of PCI RAID controller chips at Adaptec and leading verification for SOC integration at Seagate Technology. Jeff has held key positions at Digeo, where they architected the return channel QAM modulator for modem cores, and at Apple, where they worked on CoreAnimation and CoreGraphics technologies. With a Master's Degree in Electrical Engineering from Stanford University and a B.S. in Electrical and Computer Engineering from the University of Colorado at Boulder, Jeff brings a well-rounded expertise in digital design and circuit engineering.
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