Vu Bui currently serves as a Senior DFT Engineer at SEMIFIVE since May 2025, focusing on DFT features including TAP/JTAG, MBIST, and BISR, as well as memory BIST insertion, validation, and pattern generation. Concurrently, Vu Bui has been a PI Engineer at Hanatec Vietnam since April 2021, specializing in timing analysis, sign-off, and convergence execution, along with expertise in STA tools such as Primetime. Prior experience includes a role as an Electronic Technician at A Phap Ltd from August 2018 to February 2021, where responsibilities involved working with various electronic components and microcontrollers. Vu Bui holds an Engineer's degree from Sai Gon University, completed in 2020.
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