Bryan Cole

Bryan Cole has worked in various positions in the tech industry since 2017. In that year, they were an Instructional Student Assistant for Data Structures and Algorithms at San Jose State University, as well as a Hardware Research Intern designing an efficient reduction-free multiplication for finite fields and polynomial rings. In 2018, they worked as a Hardware Validation Intern at Intel Corporation, where they used the Universal Verification Methodology (UVM) and SystemVerilog to integrate multiple unit level test blocks into the full chip model, developed a methodology for using System Verilog Assertion macros in RTL design, and created a UVM clock calibration validation design. That same year, they were a Software Engineer Intern at General Dynamics Mission Systems, where they led a group in a proof of concept AI project using TensorFlow with Markov Chains for RF emission prediction and built a company framework for evaluating and designing machine learning projects. In 2019, they joined Intel Corporation as a SOC Design and Validation Engineer, leading validation designer of full-chip test environment for Intel Optane Next Generation Memory. Bryan is currently employed as a Software Engineer at Semiotic Labs.

Bryan Cole attended American River College from 2012 to 2016, where they obtained an Associate's Degree in Computer Science, an Associate of Science in Mathematics, and an Associate of Science in Physical Sciences. Bryan then attended San Jose State University from 2016 to 2018, where they earned a Bachelor's Degree in Computer Engineering.