Madek Graham

Madek Graham has a diverse work experience in the semiconductor industry. Madek has worked as a Principal EDA Engineer at Semtech since 2013. Prior to that, they were a CAE Principal Engineer at Intersil from 2004 to 2013, specializing in backend verification and pcell development. Madek also served as the Director of Design Services at Xicor, Inc. from 2002 to 2004, leading the mask design and CAE groups. Before that, they were a Senior Layout Manager at Analog Integration Partners, LLC. from 2001 to 2002, responsible for layout and various other tasks. Madek also worked as a Senior CAD Engineer at Ikanos Communications Inc. in 2000 and as a Senior Layout & CAD Engineer at Aureal Semiconductors from 1997 to 1999. Madek started their career as a Layout Designer at Rockwell Corporation, Semiconductor Systems from 1994 to 1997.

Madek Graham attended California Polytechnic State University-San Luis Obispo from 1990 to 1994, where they earned a BS in Electronic Engineering Technology.