Mark Ferris

Lead Electronic Design Engineer at Senceive

Mark Ferris has a diverse work experience in the field of electronics engineering. Mark is currently serving as the Lead Engineer - Electronics at Senceive, a world leader in wireless condition monitoring solutions. In this role, they have been responsible for technical management and hands-on R&D. Prior to this, Mark worked as the CTO at Senceive from April 2019 to January 2021, where they contributed to the design, manufacture, and continuous improvement of wireless condition monitoring solutions.

Before joining Senceive, Mark held the position of Head of R&D at Le Maitre Ltd from September 2017 to April 2019. Mark was also an Electronic Design Engineer at Le Maitre Ltd from June 2015 to August 2017. During their time at Le Maitre, Mark was responsible for modernizing the R&D department and product line by developing embedded software, electronic hardware, and improving development practices and documentation.

Prior to their experience at Le Maitre, Mark worked as a Senior Hardware Development Engineer at Nortech International from October 2011 to May 2015. Mark also served as a Systems Electronic Engineer at CheckIT Systems from December 2010 to September 2011. Mark began their career as a Hardware Development Engineer at Nortech International from August 2008 to November 2010. Mark started their professional journey as a Junior Development Engineer at NET1 UEPS Technologies Inc. from November 2007 to July 2008.

Overall, Mark Ferris has proven expertise in the field of electronics engineering, with a focus on technical management, R&D, and improving product development processes.

Mark Ferris completed their education at the University of KwaZulu-Natal from 2004 to 2007, where they earned a Bachelor of Science in Electronic Engineering. Prior to that, they attended Pinetown Boys High School from 1999 to 2003, where they completed their matriculation with a focus on subjects such as Maths, Science, Technical Drawing, Electronics, English, and Afrikaans.

Links


Timeline

  • Lead Electronic Design Engineer

    January, 2021 - present

  • CTO

    April, 2019