Qiang Wang

Qiang Wang is an experienced manager in the semiconductors industry, currently serving as a Senior R&D Manager at SenseTime since 2021. Previously, Qiang led SOC DV efforts at HXT Semiconductor and served as a SOC DV Manager at New H3C Group, with earlier roles including SOC Verification Engineer at HiSilicon and SOC DV Leader at AMD. Qiang possesses strong skills in VMM/UVM, Perl, C/C++, SystemVerilog, and SystemC, and has a Bachelor's degree in Electronic Information Engineering from China University of Geosciences (Beijing).