Adi Segal is a seasoned verification engineer with extensive experience in the semiconductor industry, beginning with a Bachelor of Science in Electrical and Electronics Engineering from Tel Aviv University. Segal worked as a Design Verification Engineer at Intel Corporation from January 2017 to June 2021, followed by a role as a Senior Design Verification Engineer at Qualcomm until December 2022, focusing on the verification of SDR (DSP) blocks. From January 2023 to December 2023, Segal served as a Senior Design Verification Engineer at Wisense Technologies Ltd, where expertise in UVM and SystemVerilog methodologies was applied to DSP block verification. Currently, Segal is a Senior Verification Lead at Sequans Communications since January 2024, emphasizing hands-on experience in verification methodologies.
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