UST – a leading Semiconductor and Digital Technologies Company has acquired SeviTech System - a fast growing VLSI Design Services company. UST - SeviTech is providing it’s design services expertise to several Semiconductor Companies in VLSI RTL to GDS digital & analog flow, Post Silicon Validation, Systems & Board Design etc. in various business models like ODC, TurnKey, Fixed-price, KPI, Cluster, T&M etc.
We at UST – Sevitech, specialize in ASIC design covering entire Frontend, Backend and Mixed Signal Design aspects for both Semi custom and full custom designs. As a design house, we provide VLSI Hardware solutions and services to a wide range of industry segments like Wireless, Networking, Enterprise, IoT, Telecom, Storage and other niche areas like AI / ML specific next generation products at sub-nanometer technologies. We provide end to end VLSI Pre-Silicon solutions ranging from Soft IP, Hard IPs and Mixed Signal IPs including analog and radio designs. We have delivered several end2end projects where we engage at the System level or Spec level and have co-created the design architecture and micro architecture, along with the client. Several custom ASIC and FPGA development have seen 1st pass success.
We provide FPGA solutions for various applications and support FPGA based emulation, prototyping, High Level Synthesis and Matlab based DSP algorithm solutions. Verification and Validation alongwith Embedded Software solutions are part of our offerings.
We take Custom ASIC turnkey projects to execute from RTL-2-GDS or Netlist-2-GDS based on a wide variety of business models. We partner with OEMs/ODMs worldwide to engage in Package Design, Reference Board Design and interface with several leading foundries.
UST - Sevitech provides extensive services for foundry collaterals. We have expertise in developing foundation IPs like Standard Cells, Memories, IOs, PDKs, Library development etc. for all major EDA tools supplier on a wide range of nm and technologies.

AI/ML

Semiconductor

SeviTech Systems Pvt. Ltd.

SeviTech Systems Pvt. Ltd.'s headquarters in Bangalore, India

The Design Verification Engineers at SeviTech Systems Pvt. Ltd. are responsible for ensuring the functionality and performance of ASIC and FPGA designs before fabrication. They utilize various verification methodologies, including formal verification and simulation, to identify and rectify design flaws, thereby guaranteeing that the final product meets specified requirements. This team collaborates closely with design engineers to validate complex digital and mixed-signal circuits, ensuring high-quality outcomes in semiconductor projects, from RTL to GDS.

Design Verification Engineers

The Engineering Roles team at SeviTech Systems Pvt. Ltd. specializes in designing and validating advanced VLSI hardware solutions, covering all stages from RTL to GDS for ASICs and FPGAs. This diverse team of engineers collaborates on projects across various domains, including wireless, IoT, and AI, ensuring high first-pass success rates with expertise in physical design, analog layout, verification, and post-silicon validation. By leveraging their extensive knowledge of semiconductor technologies, they deliver tailored solutions and support clients throughout the design lifecycle.

Engineering Roles

This department focuses on providing technical expertise and support for project implementations and operational efficiencies.

Technical Services

This department focuses on designing and implementing test strategies and methodologies to ensure product reliability and performance.

Design for Test

This department specializes in the design and development of analog layout circuits.

Analog Layout Engineering

This department focuses on the design, development, and verification of application-specific integrated circuits.

SeviTech Systems Pvt. Ltd.

Org chart

Teams

Design Verification Engineers

Engineering Roles

Technical Services

Design for Test

Analog Layout Engineering

ASIC Engineering

Offices

SeviTech Systems Pvt. Ltd.

Org chart

Teams

Design Verification Engineers

Engineering Roles

Technical Services

Design for Test

Analog Layout Engineering

ASIC Engineering

Offices

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