MEET MEHTA

Meet Mehta is a Design Verification Engineer currently serving as a Staff Verification Engineer at SiFive. With a strong background in VLSI and design verification, they have worked in various roles, including as a DFT Engineer at eInfochips and a Design Verification Engineer at Alpha Numero, where they specialized in FPGA design verification. Their experience also includes roles in renowned organizations such as the Barcelona Supercomputing Center and Ignitarium, focusing on complex design verification challenges and the implementation of efficient scripts. Meet holds a higher secondary education degree in science from Shree Swaminarayan Namisharanya High School.