Cejo K. Lonappan

Cejo K. Lonappan has a long and varied work experience beginning in 2006. Cejo worked as a Post Silicon Test Engineer for Cypress Semiconductors and then as a Lecturer at Model Engineering College in 2007. In 2009, they were the Chairperson of the IEEE Kerala Section GOLD Affinity Group and a Research Project Staff at the Indian Institute of Technology, Bombay. From 2010 to 2011, they were a Postdoctoral Researcher, Graduate Student Researcher, and Teaching Assistant for EE180D System Design and EEM116L/CSM152A Introductory Digital Design Laboratory at the University of California, Los Angeles. Additionally, they were a Graduate Student Researcher at the Center for Integrated Access Networks, an NSF funded ERC. Since 2017, they have been the Chair of the IEEE Photonics Society Los Angeles Chapter, Coastal LA Section. Currently, they are a Principal Systems Engineer and Senior Hardware Engineer at SiLC Technologies, Inc.

Cejo K. Lonappan has a long history of education. Cejo graduated from Navanirman Senior Secondary School, Kochi in 2000 with a High School degree. Cejo then attended Model Engineering College from 2000 to 2004, earning a B. Tech in Electronics and Communication Engineering. Cejo continued their education at the University of California, Los Angeles, where they obtained a Master of Science (MS) in Electrical Engineering in 2012 and a Doctor of Philosophy (Ph.D.) in Electrical Engineering in 2018.