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SiTime
Will Chen

Will Chen

Senior Manager, Circuit Design Engineering at SiTime

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Manager

Rajkumar Palwai

Director Of Circuit Design

Peers

Fleura Hajilou

Analog/mixed Signal IC Designer

Marco D'Avino

Analog Mixed-signal Designer

Ugur Sonmez

Sr. CMOS Analog Mixed-signal Designer

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Timeline

Senior Manager, Circuit Design Engineering
February, 2022 - present
Circuit Design Manager
August, 2019
Principal Engineer
June, 2011

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