Lee Yeng Wei is currently a Staff Custom Layout Design Engineer at Skyechip, specializing in integrated circuit layout and design. Previously, Lee held various engineering roles at transformative companies including UST Global, where responsibilities included digital backend QA checks, and Keysight Technologies, focusing on product yield improvement and failure analysis. Lee's background also includes experience as a Product Engineer at Agilent Technologies and a Bachelor's Degree in Technology in Electronics from Wawasan Open University. With expertise in multiple advanced technologies and a strong commitment to team collaboration, Lee actively mentors junior engineers in the field.
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