kumar gavanurmath

Kumar Gavanurmath is a DFT Engineer with extensive experience in scan architecture analysis and coverage improvement. They have worked as a Design Engineer at Tessolve Semiconductor and have held positions as a Senior DFT Engineer at Cerium Systems and Samsung Semiconductor India R&D. Currently, Kumar is a Staff Engineer at Samsung and is also preparing to take on the role of Design Lead at Tessolve. With a Master’s Degree in VLSI Design & Embedded Systems from Nitte Meenakshi Institute of Technology, Kumar possesses a strong foundation in logic design, fault modeling, and various industry-standard tools.