Ricardo Cassia

Ricardo Cassia is a Storage Architect at Solidigm since 2025. They have extensive experience in the technology sector, having worked as a Principal SoC Frontend Design Engineer at Rain AI from 2024 to 2025, and held various engineering roles, including Principal SoC Architect and Design at Netlist from 2022 to 2024, and Technologist at NGD Systems from 2014 to 2022. Previously, Ricardo worked as a Technologist at WD, a Western Digital company, and as a Principal ASIC Design Engineer at sTec, Inc. from 2006 to 2011. They began their career as an ASIC Design Engineer at Morpho Technologies from 2001 to 2006. Currently, they are pursuing a Doctor of Philosophy (PhD) in Asynchronous Circuits at the Universidade Federal do Rio de Janeiro.