Chwei King Mok has extensive experience in hardware design and architecture, currently serving as a Senior IP Logic Designer at Intel Corporation since 2010, where responsibilities include leading the Soft IP Group in PCIe based fabric development and co-developing a configuration management tool. Mok's previous role as a Senior Hardware Architect at Sonics, Inc. since 2001 involved architecture design and RTL development for the SMART Interconnect family, along with managing a team and contributing to product strategy. Earlier experience includes a position as a Hardware Engineer at PacketStream, Inc., focusing on microarchitecture and RTL development for QoS products. Chwei King Mok holds a Master of Science in Electrical Engineering and a Bachelor of Science in Electrical Engineering with honors, both from the University of Kentucky.
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