Neeraj S.

Fpga/asic Verification Engineer II

Neeraj S. is an experienced FPGA/ASIC Verification Engineer at SpaceX, specializing in Starlink Engineering since August 2023. Previously, Neeraj served as a Graduate Student Researcher in the Salahuddin Group at UC Berkeley from August 2022 to May 2023, focusing on NBTI reliability in negative capacitance p-SOI MOSFETs for a thesis project. Neeraj interned at AMD as an Advanced Technology Validation Intern in the summer of 2022, concentrating on performance modeling for advanced technology nodes. Additional research experience includes work at Berkeley Lab on graphene nanoribbon FET characterization and contributions to an Undergraduate Research Apprentice Program at UC Berkeley involving MATLAB simulations. Neeraj also has experience as an academic student employee for EECS courses at UC Berkeley and as a data modeler at Temple University, where self-directed Python skills were applied. Neeraj holds both a Master of Science and Bachelor of Science in Electrical Engineering from UC Berkeley and graduated from Garnet Valley High School in 2019.

Links

Previous companies


Org chart

No direct reports

Teams

This person is not in any teams


Offices

This person is not in any offices