Pascal Vezien

Pascal Vezien is a Senior ASIC Design Engineer at ST-Ericsson, where they utilize their expertise in the ASIC Design Flow from RTL to GDSII. Vezien has held previous positions as a Senior IC Design Engineer at both PHILIPS Semiconductors in Rennes and THOMSON Silicon Components. They began their career as an IC Physical Design Engineer at PHILIPS Semiconductors in Caen. Vezien earned an engineering degree in Electronics from the Ecole Nationale Supérieure d'Electronique, Informatique et de Radiocommunications de Bordeaux between 1991 and 1994.