Andrea Paganini

Andrea Paganini is a Senior Analog Design Engineer at STMicroelectronics, where they have worked since 2002, focusing on analog circuit design for CMOS semiconductors, including clock synthesis and SerDes TX design. Previously, they were a grant holder at CoreCom from 2000 to 2002, where they contributed to the design and manufacturing of optoelectronic devices for optical communications. Andrea obtained a Master's degree in Electronic Engineering from MIP Politecnico di Milano, completing their studies in 2001.