Archana Bhatla

Archana Bhatla is a Technical Leader at STMicroelectronics, with a wealth of experience in physical design engineering gained from positions at Qualcomm, Synopsys, and RV-VLSI Design Center. They hold an Advanced Diploma in ASIC Design - Physical Design from RV-VLSI Design Center and a Bachelor of Engineering in Electrical and Electronics Engineering from Acharya Institute of Technology, where they graduated with First Class with Distinction. Archana has expertise in physically designing block-level designs, performing static timing analysis, and utilizing various industry-standard tools such as Synopsys IC Compiler and PrimeTime. In addition, they have contributed to projects focusing on energy efficiency and have experience as a physical design trainer.