BINU P KUMAR

Binu P Kumar is a Senior Design Engineer at STMicroelectronics, where they currently excel in IP Design and have extensive experience in Verilog, System Verilog, and various design tools including Cadence and Synopsys. Prior to this role, Binu worked as a Project Engineer at Wipro Limited and as an FPGA Engineer at Reliance Jio. They began their career as a Design Engineer at Ignitarium Technology Solutions Pvt Ltd and completed a Project Internship. Binu holds a degree from Amrita Vishwa Vidyapeetham, where they achieved a commendable score of 9.14 out of 10.