bipul halder

Bipul Halder is currently a Principal Engineer and Senior Member Technical Staff at STMicroelectronics Pvt. Ltd., leading a team focused on Ethernet Subsystem SoC verification in the automotive domain. With over 17 years of experience, Bipul has expertise in SoC RTL-GLS verification and silicon validation, particularly involving multi-core architectures based on ARM and Power-PC. Bipul has also developed and verified Boot ROM code for automotive SoCs and possesses strong skills in testbench development using System Verilog, UVM, and SVBCL. Prior to this role, Bipul worked as a Design Engineer at Sasken Communication Technologies Ltd., where they contributed to post-silicon validation and hardware debugging. Bipul holds a Master of Technology in Electronics and Communication Engineering from the University School of Management Studies and a Bachelor of Technology in Electronics and Communication Engineering from West Bengal University of Technology, Kolkata.