Biswarup Pal

Biswarup Pal is a Technical Leader in Physical Design at STMicroelectronics, with over six years of experience in ASIC Physical Design and Static Timing Analysis. They have worked extensively with 7nm, 6nm, and 5nm technologies, handling critical blocks to achieve optimal performance, power, and area (PPA). Biswarup possesses expertise in various aspects of physical design, including floorplan, placement, clock tree synthesis, routing, and timing closure, and has gained proficiency in scripting with Shell, TCL, and Python. They also hold a Master of Technology degree in VLSI & Micro-Electronics from Maulana Abul Kalam Azad University of Technology, West Bengal. Prior to their current position, they worked as a Physical Design Engineer at Synapse Design Inc.