Deepak Sharma

Deepak Sharma is a SoC Physical Design Engineer with extensive knowledge of the complete ASIC flow from RTL to GDS2. Deepak has experience in Logic Design, CMOS Design, and Physical Design processes, including floorplanning, power planning, and layout design. Previously, Deepak worked at Capgemini Engineering as an ASIC Physical Design Engineer and completed a training program at RV-VLSI. Deepak is currently a Senior Design Engineer at STMicroelectronics, and holds a Bachelor's degree in Electronics and Communications Engineering from Guru Jambheshwar University.