Jenny Liu

Jenny Liu is a seasoned engineer with extensive experience in ASIC and FPGA design and verification, currently serving as a Senior ASIC FPGA Design and Verification Engineer at STMicroelectronics since August 2011. Jenny's expertise includes the front-end design and verification of PLC SoC ASICs, along with significant work on Turbo Decoding and integration assessments for Cortex ARM cores. Prior roles include Manufacturing Engineer at Abbott, where Jenny focused on production support for medical devices, and Sr. ASIC Design Engineer at AMD, contributing to SoC ASICs for graphic applications. With experience spanning back to 1994, Jenny has held various engineering positions, including hardware design and FPGA projects, and boasts advanced degrees in Electrical Engineering from prestigious institutions, achieving high GPAs.