Jens Grunert

Jens Grunert is a Senior ASIC Designer at STMicroelectronics, specializing in physical implementation of digital designs across various technologies from 90nm to 16nm. With extensive experience in digital technologies, Jens has worked with several technology vendors including Siemens, Chartered, and TSMC, utilizing tools such as Innovus, IC Compiler, and SOC Encounter. Previously, Jens held positions at Pegasus Micro Design, IC Mask Design, and Infineon Technologies, contributing to VHDL projects and developing a patent for microcontroller emulation. Jens earned a Master’s degree in Microelectronics from The University of Manchester in 1995.