Manamohan Nath is an experienced Design Engineer with a background in the information technology and services industry. They specialize in SystemVerilog, Design Engineering, Python, Verilog, and Layout Design. After earning a Bachelor of Technology in Electronics and Communications Engineering from Silicon Institute of Technology, Manamohan worked as a Senior Design Engineer at Sevya Multimedia and is currently serving as a Technical Lead at STMicroelectronics, focusing on PDK development and Quality Assurance.
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