Massimo Silipigni is a Physical Design Senior Engineer at STMicroelectronics, where they specialize in digital back-end engineering, including floorplanning, placement, routing, and physical verification tasks. They bring extensive experience from previous roles as a Senior CAD Engineer at Micron Technology and a CAD Engineer at Numonyx, where they implemented Automatic Place and Route flows for flash memory technologies. Massimo holds a laurea in Ingegneria Elettronica from Università di Roma Tor Vergata and a laurea in Ingegneria elettrica ed elettronica from Università degli Studi di Messina. Throughout their career, they have demonstrated strong problem-solving abilities, excellent planning skills, and a commitment to teamwork.
This person is not in the org chart
This person is not in any teams
This person is not in any offices