MUKUL ANAND

Mukul Anand is a Physical Design Engineer with over 14 years of experience in ASIC and Physical Design implementation. They have demonstrated expertise in managing all aspects of the Physical Design process, including floor planning, place and route, clock tree synthesis, and timing closure at advanced technology nodes. Anand has worked with notable companies such as Infineon Technologies, eInfochips, Intel Corporation, and STMicroelectronics, where they directed full-chip designs and contributed to high-performance chip development. Currently pursuing a Master of Technology in Microelectronics at the Birla Institute of Technology and Science, Pilani, they are skilled in collaborating with cross-functional teams and using industry-standard tools like Cadence Innovus and Synopsys Fusion Compiler.