PARNAV GUPTA

Parnav Gupta is a Senior Design Engineer at STMicroelectronics, where they specialize in emulation bringup on the Palladium tool. Parnav previously worked as a Research and Development Engineer at Synopsys Inc from 2020 to 2022, following a Post Graduate Technical Internship at Synopsys Ind Pvt Ltd, where they gained experience analyzing the effects of Negative Bias Temperature Instability on 6T SRAM Bit Cells. They hold a Master’s degree in Microelectronics and VLSI Design from Kurukshetra University, where they studied from 2017 to 2019, and a B.Tech in Electrical, Electronics, and Communications Engineering from Seth Jai Parkash Mukand Lal Institute of Engineering & Technology.