Pierre Blache is a Senior DUV engineer currently working at STMicroelectronics, where they design and conceive QAcells to validate design rules on advanced technology nodes. With a background in manufacturing and R&D, they were previously a Senior R&D layout design engineer at the same company, where they led projects and developed innovative layouts for various devices. Pierre also held roles as a TR&D poly etch process engineer and rush lot team manager, demonstrating expertise in process development and team leadership. They graduated with an engineer diploma from Ecole nationale supérieure des Mines de Saint-Etienne, after earning a BTS in electronics.
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