Saransh Mehrotra

Saransh Mehrotra is an experienced IP/SoC Design Verification Engineer with a strong background in both the automotive and embedded systems sectors. They have expertise in verification planning, SystemVerilog, C, and Universal Verification Methodology (UVM), along with knowledge of various bus protocols like AXI and AHB. Saransh has held positions at prominent companies including STMicroelectronics and Mechatronics Test Equipment Pvt Ltd, and has contributed to the development of verification environments for next-generation processors. They possess a Bachelor of Technology in VLSI from Dhirubhai Ambani Institute and a PGP from the Indian Institute of Management, Lucknow. Additionally, Saransh is active in CSR and volunteering activities.