Shaifali Bansal is an IP Verification Engineer with a strong background in VLSI design. They completed an MTech in VLSI Design at Thapar University from 2010 to 2012. Shaifali has held multiple positions, including Digital Design Engineer at Texas Instruments from 2012 to 2014, Principal Product Validation Engineer at Cadence Design Systems from 2016 to 2022, and has been serving as a Senior Staff Verification Engineer at STMicroelectronics since 2022.
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