Shilpee Singh is a skilled engineer with extensive experience in layout design and technical leadership. Currently a Staff Engineer at STMicroelectronics since September 2021, Shilpee previously worked as a Senior Layout Engineer and technical lead at Zia Semiconductor Pvt Ltd and ST Microelectronics from June 2013 to April 2020, where responsibilities included designing memory layout blocks and leading a team of freshers. Prior roles include Scribe Design Engineer at Micron Technology and Layout Engineer at Wipro Technologies, where Shilpee contributed to IO layout design and standard cell characterization at an ARM client location. Shilpee holds a Bachelor of Engineering in Power Electronics from Le College, graduated in 2008, and completed pre-university education at KV No 2 from 2002 to 2004.
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